简介:
This book includes a selection oftopics intended to make it useful to readers with a wide range of previous exposure to the field. Chapters l through 5 cover many of the basic concepts in computer organization including how performance is pro 6 and 7 cover pipelining and instruction-level parallelism. two technologies that are extremely important to the performance ofmodem processors. Chapters 8, 9, and I O cover memory system design. including memory hierarchies, caches, and virtual memory. Chapter II describes I/0 systems, while Chapter 12 provides an inuoduction to multiprocessor systems----computers that combine multiple processors to deliver improved performance.

  书    名 计算机体系结构习题与解答（英文版）  页数 320
  作    者 （美）Nicholas Carter  开本 16
  出 版 社 机械工业出版社  印张 0
  出版时间 2002年8月第1版  页数 320
  再版时间 2002年8月第1次  书号 111-10418-8
  装    帧 平装  定价  30元 
 

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目录:
CHAPTER I Introd uction

l .l Purpose of This Book

l .2 Background Assumed

l .3 Material Covered

l .4 Chapter Objectives

l .5 Technological Trends

l .6 Measuring Performance

l .7 Speedup

l .8 Amdahl's Law

l.9 S

- Solved Problems

CHAPTER 2 Data Representations and Computer Arithmetic

2. l Objectives

2.2 From Electrons to Bits

2.3 Binary Representation of Positive Integers

2.4 Arithmetic Operations on Positive Integers

2.5 Negative Integers

2.6 Floating-Point Numbers

2.7 S

Solved Problems

CHAPTER 3 Computer Organization

3. I Objectives

3 .2 Introduction

3 . 3 Programs

3 .4 Operating Systems

3 .5 Computer Oganization

3.6 Summary

Solved Problems

CHAPTER 4 Programming Models

4. l Objectives

4.2 Introduction

4.3 Types of Instructions

4.4 Stack-Based Architectures

4.5 General-Purpose Register Architectures

4.6 Comparing Stack-Based and General-Purpose Register

Architectures

4.7 Using Stacks to Implement Procedure Calls

4. 8 Summary '

Solved Problems

CHAPTER 5 Processor Design

5 .l Objectives

5 .2 Introduction

5 .3 Instruction Set Architecture

5 .4 Processor Microarchitecture

5.5 S

Solved Problems

CHAPTER 6 Pipelining

6. l Objectives

6 .2 Introduction

6. 3 Pipelining

6.4 Instruction Hazards and Their Impact on Throughput

6.5 Predicting Execution Time in Pipelined Processors

6.6 Result Forwarding (Bypassing)

6.7 S

Solved Problems

CHAPTER 7 Instruction-Level Parallelism

7. l Objectives

7 .2 Introduction .

7.3 What is Instruction-Level Parallelism?

7.4 Limitations of instruction-Level Parallelism

7.5 Superscalar Processors

7.6 In-Order versus Out-of-Order Execution

7.7 Register Renaming '

7.8 VLIW Processors

7.9 Compilation Techniques for Instruction-Level Palallelism

7.IO S

Solved Problems

CHAPTER 8 Memory Systems

8. l Objectives

8 .2 Introduction

8.3 Latency, Throughput and Bandwidth

8.4 Memory Hierarchies

8.5 Memory Technologies

8.6 S

Solved Problems

CHAPTER 9 Caches

9. l Objectives

9.2 Introduction

9.3 Data Caches, Instruction Caches, and Unified Caches

9.4 Describing Caches

9.5 Capacity

9.6 Line Length

9 .7 Associativity

9.8 Replacement Policy

9.9 Write-Back versus Write-Through Caches

9. IO Cache Implementations

9.Il Tag Arrays

9.12 Hit/Miss Logic

9.13 Data Arrays

9. 14 Categorizing Cache Misses

9.15 Multilevel Caches

9.16 S

Solved Problems

CHAPTER IO Virtual Nemory

l0.l Objectives '

10.2 Introduction

10.3 Address Translation

10.4 Demand Paging versus Swapping

10.5 Page Tables

10.6 Translation Lookaside Buffers

10.7 Proteaion

10.8 Caches and Virtual Memory

10.9 Summary

Solved Problems

CHAPTER Il I/O

l l.l Objectives

l l.2 Introduction

1l.3 I/0 Buses

l l.4 Interrupts

l I.5 Memory-Mapped I/O

l l .6 Direct Memory Aceess

I l.7 I/O Devices

l l.8 Disk Systems

11.9 S

Solved Problems

CHAPTER I 2 Multiprocessors

12.1 Objectives

12.2 Introduction

12.3 Speedup and Performance

1 2.4 Multiprocessor Systems

12.5 Message-Passing Systems

l 2.6 Shared-Memory Systems

12.7 Comparing Message-Passing and Shared Memory

12.8 Summary

Solved Problems

INDEX